1 //////////////////////////////////////////////////////////////////////////////
3 // fdctam32.c - AP922 MMX(3D-Now) forward-DCT
5 // Intel Application Note AP-922 - fast, precise implementation of DCT
6 // http://developer.intel.com/vtune/cbts/appnotes.htm
9 // This routine uses a 3D-Now/MMX enhancement to increase the
10 // accuracy of the fdct_col_4 macro. The dct_col function uses 3D-Now's
11 // PMHULHRW instead of MMX's PMHULHW(and POR). The substitution improves
12 // accuracy very slightly with performance penalty. If the target CPU
13 // does not support 3D-Now, then this function cannot be executed.
14 // fdctmm32.c contains the standard MMX implementation of AP-922.
16 // For a fast, precise MMX implementation of inverse-DCT
17 // visit http://www.elecard.com/peter
19 // v1.0 07/22/2000 (initial release)
20 // Initial release of AP922 MMX(3D-Now) forward_DCT.
21 // This code was tested with Visual C++ 6.0Pro + service_pack4 +
22 // processor_pack_beta! If you have the processor_pack_beta, you can
23 // remove the #include for amd3dx.h, and substitute the 'normal'
24 // assembly lines for the macro'd versions. Otherwise, this
25 // code should compile 'as is', under Visual C++ 6.0 Pro.
27 // liaor@iname.com http://members.tripod.com/~liaor
28 //////////////////////////////////////////////////////////////////////////////
32 //////////////////////////////////////////////////////////////////////
34 // constants for the forward DCT
35 // -----------------------------
37 // Be sure to check that your compiler is aligning all constants to QWORD
38 // (8-byte) memory boundaries! Otherwise the unaligned memory access will
39 // severely stall MMX execution.
41 //////////////////////////////////////////////////////////////////////
43 #define BITS_FRW_ACC 3 //; 2 or 3 for accuracy
44 #define SHIFT_FRW_COL BITS_FRW_ACC
45 #define SHIFT_FRW_ROW (BITS_FRW_ACC + 17)
46 //#define RND_FRW_ROW (262144 * (BITS_FRW_ACC - 1)) //; 1 << (SHIFT_FRW_ROW-1)
47 #define RND_FRW_ROW (1 << (SHIFT_FRW_ROW-1))
48 //#define RND_FRW_COL (2 * (BITS_FRW_ACC - 1)) //; 1 << (SHIFT_FRW_COL-1)
49 #define RND_FRW_COL (1 << (SHIFT_FRW_COL-1))
51 //concatenated table, for forward DCT transformation
52 const int16_t fdct_tg_all_16[] = {
53 13036, 13036, 13036, 13036, // tg * (2<<16) + 0.5
54 27146, 27146, 27146, 27146, // tg * (2<<16) + 0.5
55 -21746, -21746, -21746, -21746, // tg * (2<<16) + 0.5
56 -19195, -19195, -19195, -19195, //cos * (2<<16) + 0.5
57 23170, 23170, 23170, 23170 }; //cos * (2<<15) + 0.5
58 const long long fdct_one_corr = 0x0001000100010001LL;
59 const long fdct_r_row[2] = {RND_FRW_ROW, RND_FRW_ROW };
61 const int16_t tab_frw_01234567[] = { // forward_dct coeff table
63 16384, 16384, 21407, -8867, // w09 w01 w08 w00
64 16384, 16384, 8867, -21407, // w13 w05 w12 w04
65 16384, -16384, 8867, 21407, // w11 w03 w10 w02
66 -16384, 16384, -21407, -8867, // w15 w07 w14 w06
67 22725, 12873, 19266, -22725, // w22 w20 w18 w16
68 19266, 4520, -4520, -12873, // w23 w21 w19 w17
69 12873, 4520, 4520, 19266, // w30 w28 w26 w24
70 -22725, 19266, -12873, -22725, // w31 w29 w27 w25
73 22725, 22725, 29692, -12299, // w09 w01 w08 w00
74 22725, 22725, 12299, -29692, // w13 w05 w12 w04
75 22725, -22725, 12299, 29692, // w11 w03 w10 w02
76 -22725, 22725, -29692, -12299, // w15 w07 w14 w06
77 31521, 17855, 26722, -31521, // w22 w20 w18 w16
78 26722, 6270, -6270, -17855, // w23 w21 w19 w17
79 17855, 6270, 6270, 26722, // w30 w28 w26 w24
80 -31521, 26722, -17855, -31521, // w31 w29 w27 w25
83 21407, 21407, 27969, -11585, // w09 w01 w08 w00
84 21407, 21407, 11585, -27969, // w13 w05 w12 w04
85 21407, -21407, 11585, 27969, // w11 w03 w10 w02
86 -21407, 21407, -27969, -11585, // w15 w07 w14 w06
87 29692, 16819, 25172, -29692, // w22 w20 w18 w16
88 25172, 5906, -5906, -16819, // w23 w21 w19 w17
89 16819, 5906, 5906, 25172, // w30 w28 w26 w24
90 -29692, 25172, -16819, -29692, // w31 w29 w27 w25
93 19266, 19266, 25172, -10426, // w09 w01 w08 w00
94 19266, 19266, 10426, -25172, // w13 w05 w12 w04
95 19266, -19266, 10426, 25172, // w11 w03 w10 w02
96 -19266, 19266, -25172, -10426, // w15 w07 w14 w06,
97 26722, 15137, 22654, -26722, // w22 w20 w18 w16
98 22654, 5315, -5315, -15137, // w23 w21 w19 w17
99 15137, 5315, 5315, 22654, // w30 w28 w26 w24
100 -26722, 22654, -15137, -26722, // w31 w29 w27 w25,
103 16384, 16384, 21407, -8867, // w09 w01 w08 w00
104 16384, 16384, 8867, -21407, // w13 w05 w12 w04
105 16384, -16384, 8867, 21407, // w11 w03 w10 w02
106 -16384, 16384, -21407, -8867, // w15 w07 w14 w06
107 22725, 12873, 19266, -22725, // w22 w20 w18 w16
108 19266, 4520, -4520, -12873, // w23 w21 w19 w17
109 12873, 4520, 4520, 19266, // w30 w28 w26 w24
110 -22725, 19266, -12873, -22725, // w31 w29 w27 w25
113 19266, 19266, 25172, -10426, // w09 w01 w08 w00
114 19266, 19266, 10426, -25172, // w13 w05 w12 w04
115 19266, -19266, 10426, 25172, // w11 w03 w10 w02
116 -19266, 19266, -25172, -10426, // w15 w07 w14 w06
117 26722, 15137, 22654, -26722, // w22 w20 w18 w16
118 22654, 5315, -5315, -15137, // w23 w21 w19 w17
119 15137, 5315, 5315, 22654, // w30 w28 w26 w24
120 -26722, 22654, -15137, -26722, // w31 w29 w27 w25
123 21407, 21407, 27969, -11585, // w09 w01 w08 w00
124 21407, 21407, 11585, -27969, // w13 w05 w12 w04
125 21407, -21407, 11585, 27969, // w11 w03 w10 w02
126 -21407, 21407, -27969, -11585, // w15 w07 w14 w06,
127 29692, 16819, 25172, -29692, // w22 w20 w18 w16
128 25172, 5906, -5906, -16819, // w23 w21 w19 w17
129 16819, 5906, 5906, 25172, // w30 w28 w26 w24
130 -29692, 25172, -16819, -29692, // w31 w29 w27 w25,
133 22725, 22725, 29692, -12299, // w09 w01 w08 w00
134 22725, 22725, 12299, -29692, // w13 w05 w12 w04
135 22725, -22725, 12299, 29692, // w11 w03 w10 w02
136 -22725, 22725, -29692, -12299, // w15 w07 w14 w06,
137 31521, 17855, 26722, -31521, // w22 w20 w18 w16
138 26722, 6270, -6270, -17855, // w23 w21 w19 w17
139 17855, 6270, 6270, 26722, // w30 w28 w26 w24
140 -31521, 26722, -17855, -31521 // w31 w29 w27 w25